Frequency locked phase estimation

A novel method of synchronization is proposed for the estimation of the phase of the fundamental component of harmonically distorted power line voltage. Common phase synchronization techniques involve a multiplication of the line voltage signal with an estimate of the fundamental line voltage component, to measure the discrepancy between the line phase and the estimated phase, and this results in undesired frequency components in the phase error signal. These new frequency components cause ripple in the output phase estimation, which can typically be reduced by low-pass filtering following the phase detection, at the expense of slowing down the overall dynamic response of the synchronization process. To address the harmonic distortion in the line voltage signal, the proposed method measures the phase error by directly subtracting the incoming signal from a one-cycle delayed copy of this same signal. This error signal is then used to adapt the sampling rate to maintain a fixed ratio of sampling to line signal frequencies. For a harmonically distorted signal, this produces a zero steady state phase error signal, and a ripple-free sampling frequency. This sampling clock signal serves to operate a fixed discrete frequency quadrature signal generator, used to perform a sliding correlation of the input signal with the quadrature signals, to extract an estimate of the tine voltage fundamental component. The principal feedback loop in the proposed method aims only at frequency tracking, resulting in faster overall response. Simulation results are presented to validate this proposed method.