Reduced state feedback sliding-mode current control for voltage source inverter-based higher-order circuit

被引:17
作者
Gudey, Satish Kumar [1 ]
Gupta, Rajesh [1 ]
机构
[1] MN Natl Inst Technol Allahabad, Dept Elect Engn, Allahabad 211004, Uttar Pradesh, India
关键词
UPS INVERTER; DESIGN; CONVERTERS; STRATEGY;
D O I
10.1049/iet-pel.2014.0707
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study presents a reduced state feedback sliding-mode current controller (RSFSMCC) for a voltage source inverter (VSI)-based higher-order circuit. The proposed controller consists of an inner current loop and an outer voltage loop. The reference for the inner input inverter current is generated from the outer voltage loop through a proportional plus integral controller. The stability of the system is ensured by using feedback of only two state variables, that is, input inverter current and output capacitor voltage of the VSI circuit. A reduced state feedback analysis is used to obtain the gain matrix for the higher-order circuit. The tracking control convergence criterion of the system is examined through the eigen values of the resultant state matrix derived for the VSI circuit. The frequency response plot shows that the proposed RSFSMCC is robust with good stability margins. The simulation results show that the output voltage well tracks the reference voltage with reduced steady-state error for both linear and non-linear loads. The simulation results obtained in power systems CAD/electromagnetic transients including DC (PSCAD/EMTDC) v4.2.1 software are verified through the experimental results conducted on a single-phase VSI circuit using field programmable gate array implementation of the RSFSMCC.
引用
收藏
页码:1367 / 1376
页数:10
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