共 11 条
[1]
High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies
[J].
ISLPED '00: PROCEEDINGS OF THE 2000 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN,
2000,
:155-160
[2]
[Anonymous], 2000, DIGITAL INTEGRATED C
[3]
0.18um dual Vt MOSFET process and energy-delay measurement
[J].
IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996,
1996,
:851-854
[4]
Chen ZP, 1998, 1998 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN - PROCEEDINGS, P239
[6]
Kao J., 1999, ESSCIRC'99. Proceedings of the 25th European Solid-State Circuits Conference, P118
[8]
Ng PKL, 1996, RAFFLES B ZOOL, V44, P1
[10]
Thompson S, 1997, 1997 SYMPOSIUM ON VLSI TECHNOLOGY, P69, DOI 10.1109/VLSIT.1997.623699