Simulation of mixed-signal circuits for crosstalk evaluation

被引：0

作者：

Trucco, G ^{[1
]}

Boselli, G ^{[1
]}

Liberali, V ^{[1
]}

机构：

[1] Univ Milan, Dept Informat Technol, I-26013 Crema, Italy

来源：

PROCEEDINGS OF THE 46TH IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS & SYSTEMS, VOLS 1-3 | 2003年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents an approach for simulation of mixed-signal circuits, analyzing possible sources of disturbances in analog-digital integrated systems, such as current pulses drawn from voltage supplies. A closed-form expression of voltage and current in the pull-up and the pull-down of a CMOS logic gate can be derived. A computer program demonstrates the feasibility of the proposed approach. Simulation results of a non-overlapped two-phase clock generator are presented.

引用

页码：261 / 264

页数：4

共 12 条

[1]

[Anonymous], 1996, ACM T DES AUTOMAT EL, DOI 10.1145/225871.225877

[2]

ARMAROLI D, 1995, P MIDW S CIRC SYST R, P893

[3]

BURNS JR, 1964, RCA REV, V25, P627

[4]

Chandrakasan A.P., 1995, Low Power Digital CMOS Design

[5]

Donnay S., 2003, SUBSTRATE NOISE COUP

[6]

ERRATICO P, 1997, P IEEE CAS REG 8 WOR, P1

[7]

Gerez S. H., 1999, ALGORITHMS VLSI DESI, V1st

[8] CMOS CIRCUIT SPEED AND BUFFER OPTIMIZATION [J].

HEDENSTIERNA, N ;

JEPPSON, KO .

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1987, 6 (02) :270-281

[9]

Kundert K.S., 1995, DESIGNERS GUIDE SPIC

[10] ALPHA-POWER LAW MOSFET MODEL AND ITS APPLICATIONS TO CMOS INVERTER DELAY AND OTHER FORMULAS [J].

SAKURAI, T ;

NEWTON, AR .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (02) :584-594

← 1 2 →