A Novel Low Power 3 Transistor based Universal Gate for VLSI Applications

被引：0

作者：

Priya, M. Geetha ^{[1
]}

Baskaran, K. ^{[2
]}

机构：

[1] Amrita Vishwa Vidyapeetham, Coimbatore, Tamil Nadu, India

[2] Govt Coll Technol, Coimbatore, Tamil Nadu, India

来源：

JOURNAL OF SCIENTIFIC & INDUSTRIAL RESEARCH | 2013年 / 72卷 / 04期

关键词：

low power; CMOS; pass-transistor; NAND; delay; flash memory; LOGIC; CIRCUITS; DESIGN;

D O I：

暂无

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

NAND and NOR gates are the two universal logic gates and any other logic gates can be built using them. This paper presents a novel three transistors (3T) based NAND gate with exact output logic levels, yet maintaining comparable performance than the other available NAND gate logic structures. The new logic is characterized by superior speed and low power which can be easily fabricated for Very Large Scale Integration (VLSI) designs. The simulation tests were performed by employing standard 90nm CMOS process technology.

引用

页码：217 / 221

页数：5

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