A 5-GHz Fully Integrated CMOS Class-E Power Amplifier Using Self-Biasing Technique with Cascaded Class-D Drivers

被引:0
作者
Yamashita, Yuki [1 ]
Kanemoto, Daisuke [1 ]
Kanaya, Haruichi [1 ]
Pokharel, Ramesh K. [1 ]
Yoshida, Keiji [1 ]
机构
[1] Kyushu Univ, Grad Sch Informat Sci & Elect Engn, Fukuoka 8190395, Japan
来源
PROCEEDINGS OF THE 2012 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY (RFIT) | 2012年
关键词
class-E; power amplifier; self-biasing; CMOS; fully integrated; power-added efficiency;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes the design of 5-GHz fully integrated CMOS class-E single-ended power amplifier (PA) for wireless transmitter applications in a 0.18-mu m CMOS technology. The proposed class-E PA employs the cascode topology with a self-biasing technique to reduce device stress. Three cascaded class-D driver amplifiers are used to actualize the sharp switching at the class-E power stage. All device components are integrated on chip and the chip area is 1.0 x 1.3 mm(2). The measurement results indicate that the PA delivers 16.4 dBm output power and 35.4 % power-added efficiency with 2.3 V power supply voltage into a 50 Omega load.
引用
收藏
页码:237 / 239
页数:3
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