A Few-Step and Low-Cost Memristor Logic Based on MIG Logic for Frequent-Off Instant-On Circuits in IoT Applications

被引:14
作者
Wang, Yiming [1 ,2 ]
Li, Yun [3 ]
Shen, Haihua [3 ]
Fan, Dongyu [1 ]
Wang, Wei [1 ]
Li, Ling [1 ]
Liu, Qi [1 ]
Zhang, Feng [1 ]
Wang, Xinghua [2 ]
Chang, Meng-Fan [4 ]
Liu, Ming [1 ]
机构
[1] Chinese Acad Sci, Inst Microelect, Beijing 100029, Peoples R China
[2] Beijing Inst Technol, Beijing 100081, Peoples R China
[3] Univ Chinese Acad Sci, Beijing 101408, Peoples R China
[4] Natl Tsing Hua Univ, Dept Elect Engn, Hsinchu 30013, Taiwan
基金
中国国家自然科学基金;
关键词
Frequent-off instant-on; MIG logic; multiplier; memristor; stateful logic; DESIGN;
D O I
10.1109/TCSII.2018.2882388
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Nonvolatile logic implemented by memristor devices is a potential candidate for inherent logic-in-memory architecture. Majority-inverter graph (MIG) logic is a novel logic-structure compared with conventional AND/OR/INV graphs logic. In this brief, MIG logic constructed by memristors is proposed to implement the stateful logic arithmetic. A design of full adders based on MIG logic is proposed, followed by a 4-bit Wallace tree multiplier based on the MIG logic to implement in-situ store. A test chip controlled by a FPGA is designed to verify its feasibility. Compared with multipliers implemented by conventional logic, this method has fewer steps and smaller area, making it suitable for frequent-off and instant-on circuits in IoT applications. The experimental results have proved its significance on the grounds that the 4-bit multiplier only needs 18 processing steps with 51 memristor cells to complete a multiplication arithmetic whereas, by contrast, one conventional 4-bit binary multiplier requires 648 MOSFETs and 124 steps while IMP based 4-bit multiplier logic requires 112 CRS units and 221 steps to operate a multiplying computation.
引用
收藏
页码:662 / 666
页数:5
相关论文
共 15 条
[1]  
[Anonymous], P 51 ANN AUT C AUT C
[2]   An FPGA-Based Test System for RRAM Technology Characterization [J].
Biscontini, Armando ;
Thammasack, Maxime ;
De Micheli, Giovanni ;
Gaillardon, Pierre-Emmanuel .
IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2018, 17 (01) :177-183
[3]   'Memristive' switches enable 'stateful' logic operations via material implication [J].
Borghetti, Julien ;
Snider, Gregory S. ;
Kuekes, Philip J. ;
Yang, J. Joshua ;
Stewart, Duncan R. ;
Williams, R. Stanley .
NATURE, 2010, 464 (7290) :873-876
[4]  
Chang MF, 2015, ASIA S PACIF DES AUT, P569, DOI 10.1109/ASPDAC.2015.7059068
[5]  
Chen B., 2015, IEDM, P17, DOI [10.1109/IEDM.2015.7409720, DOI 10.1109/IEDM.2015.7409720.[9]Y]
[6]  
Gaillardon PE, 2016, DES AUT TEST EUROPE, P427
[7]   Optimized Memristor-Based Multipliers [J].
Guckert, Lauren ;
Swartzlander, Earl E., Jr. .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2017, 64 (02) :373-385
[8]  
Kvatinsky S., IEEE T NANOTECHNOL
[9]   MAGIC-Memristor-Aided Logic [J].
Kvatinsky, Shahar ;
Belousov, Dmitry ;
Liman, Slavik ;
Satat, Guy ;
Wald, Nimrod ;
Friedman, Eby G. ;
Kolodny, Avinoam ;
Weiser, Uri C. .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2014, 61 (11) :895-899
[10]   Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies [J].
Kvatinsky, Shahar ;
Satat, Guy ;
Wald, Nimrod ;
Friedman, Eby G. ;
Kolodny, Avinoam ;
Weiser, Uri C. .
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2014, 22 (10) :2054-2066