Energy efficient real-time scheduling

被引：33

作者：

Sinha, A ^{[1
]}

Chandrakasan, AP ^{[1
]}

机构：

[1] MIT, Dept EECS, Cambridge, MA 02139 USA

来源：

ICCAD 2001: IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, DIGEST OF TECHNICAL PAPERS | 2001年

关键词：

D O I：

10.1109/ICCAD.2001.968679

中图分类号：

TP31 [计算机软件];

学科分类号：

081202 ; 0835 ;

摘要：

Real-time scheduling on processors that support dynamic voltage and frequency scaling is analyzed. The Slacked Earliest Deadling First (SEDF) algorithm is proposed and it is shown that the algorithm is optimal in minimizing processor energy consumption and maximum lateness. An upper bound on the processor energy savings is also derived. Real-time scheduling of periodic tasks is also analyzed and optimal voltage and frequency allocation for a given task set is determined that guarantees schedulability and minimizes energy consumption.

引用

页码：458 / 463

页数：6

共 12 条

[1]

BURD T, ISSCC 2000, P294

[2]

DERTOUZOS ML, 1974, INFORMATION PROCESSI, V74

[3]

Govil K., 1995, P 1 ANN INT C MOB CO, P13, DOI DOI 10.1145/215530.215546

[4] Embedded power supply for low-power DSP [J].

Gutnik, V ;

Chandrakasan, AP .

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 1997, 5 (04) :425-435

[5] On-line scheduling of hard real-time tasks on variable voltage processor [J].

Hong, I ;

Potkonjak, M ;

Srivastava, MB .

1998 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN: DIGEST OF TECHNICAL PAPERS, 1998, :653-656

[6]

Horn W., 1974, NAVAL RES LOGISTICS, V21

[7] SCHEDULING ALGORITHMS FOR MULTIPROGRAMMING IN A HARD-REAL-TIME ENVIRONMENT [J].

LIU, CL ;

LAYLAND, JW .

JOURNAL OF THE ACM, 1973, 20 (01) :46-61

[8]

Pering T, 1998, 1998 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN - PROCEEDINGS, P76, DOI 10.1109/LPE.1998.708159

[9]

RAMAMIRITHAM K, 1984, IEEE SOFTWARE, V1

[10]

SINHA A, 2001, 14 INT C VLSI DES BA

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