CMOS low dropout linear regulator with single Miller capacitor

被引:15
作者
Huang, WJ [1 ]
Lu, SH
Liu, SI
机构
[1] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 10617, Taiwan
[2] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan
关键词
D O I
10.1049/el:20064062
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 2-5 V 150 mA CMOS low dropout (LDO) linear regulator with a single Miller capacitor of 4 pF is presented. The proposed LDO regulator with a bandgap voltage reference has been fabricated in a 0.35 mu m CMOS process and the active chip area is 485 x 586 mu m. The maximum output current is 150 mA and the regulated output voltage is 1.8 V.
引用
收藏
页码:216 / 217
页数:2
相关论文
共 6 条
[1]   AN IMPROVED FREQUENCY COMPENSATION TECHNIQUE FOR CMOS OPERATIONAL-AMPLIFIERS [J].
AHUJA, BK .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1983, 18 (06) :629-633
[2]   An area-efficient, integrated, linear regulator with ultra-fast load regulation [J].
Hazucha, P ;
Karnik, T ;
Bloechel, B ;
Parsons, C ;
Finan, D ;
Borkar, S .
2004 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2004, :218-221
[3]   Advances in active-feedback frequency compensation with power optimization and transient improvement [J].
Lee, H ;
Mok, PKT .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2004, 51 (09) :1690-1696
[4]   A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation [J].
Leung, KN ;
Mok, PKT .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (10) :1691-1702
[5]   A low-voltage, low quiescent current, low drop-out regulator [J].
Rincon-Mora, GA ;
Allen, PE .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (01) :36-44
[6]   Optimized frequency-shaping circuit topologies for LDO's [J].
Rincon-Mora, GA ;
Allen, PE .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1998, 45 (06) :703-708