Simulated Annealing Based Selective Harmonic Elimination for Multi-level Inverter

被引：8

作者：

Kumar, N. Vinoth ^{[1
]}

Chinnaiyan, V. Kumar ^{[2
]}

Pradish, M. ^{[1
]}

Karthikeyan, S. Prabhakar ^{[1
]}

机构：

[1] Cent Power Res Inst, Bangalore, Karnataka, India

[2] KPR Inst Engn & Technol, Coimbatore, Tamil Nadu, India

来源：

FIRST INTERNATIONAL CONFERENCE ON POWER ENGINEERING COMPUTING AND CONTROL (PECCON-2017 ) | 2017年 / 117卷

关键词：

THD; power quality; multilevel inverter; selective harmonics elimination;

D O I：

10.1016/j.egypro.2017.05.203

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Several modulation techniques like Pulse Width Modulation (PWM), space vector modulation (SVM), Selective harmonic elimination (SHE) are developed for multilevel inverters to improve the quality of power. SHE technique is found to be best in comparison with other techniques for high power applications due to less switching losses and eliminates the lower order harmonics. In this paper, Simulated Annealing (SA) based technique is proposed to optimize the switching angles which reduces total harmonics distortion (THD). It is found that the proposed work shows better performance than the existing algorithms such as particle swarm optimization and cuckoo search. The experimental work is carried out for the seven level inverter and the results are validated practically. (C) 2017 The Authors. Published by Elsevier Ltd.

引用

页码：855 / 861

页数：7

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