Impact of Gate Line-Edge Roughness (LER) Versus Random Dopant Fluctuations (RDF) on Germanium-Source Tunnel FET Performance

被引：13

作者：

Damrongplasit, Nattapol ^{[1
]}

Kim, Sung Hwan ^{[2
]}

Shin, Changhwan ^{[3
]}

Liu, Tsu-Jae King ^{[1
]}

机构：

[1] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA

[2] SuVolta Inc, Los Gatos, CA 95032 USA

[3] Univ Seoul, Seoul, South Korea

来源：

IEEE TRANSACTIONS ON NANOTECHNOLOGY | 2013年 / 12卷 / 06期

基金：

新加坡国家研究基金会;

关键词：

Line-edge roughness (LER); random dopant fluctuation (RDF); TFET; TFET variability; tunneling; variability; vertical tunneling; THRESHOLD VOLTAGE FLUCTUATION; FIELD-EFFECT TRANSISTORS; REQUIREMENTS; TECHNOLOGY;

D O I：

10.1109/TNANO.2013.2278153

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The impact of gate line-edge roughness (LER) on the performance of the planar germanium-source tunnel FET with gate length L-g = 30 nm is studied via 3-D device simulation. Depending on the source formation process, gate LER can result in source LER. Therefore, two extreme cases of the source edge profile are considered herein: smooth edge and rough edge. Threshold voltage V-T variation due to gate LER is found to be minimal in each case, as compared to V-T variation caused by random dopant fluctuations (RDF). Gate LER is also found to have negligible impact on the off-state leakage current floor. In the case of a source with smooth edge, gate-LER induced variation in on-state drive current can be significant.

引用

页码：1061 / 1067

页数：7

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