Formal verification and testing of protocols

被引：5
|
作者：
Avresky, DR [1 ]
机构：
[1] Boston Univ, Dept Elect Engn, Brookline, MA 02146 USA
来源：
COMPUTER COMMUNICATIONS | 1999年 / 22卷 / 07期
关键词：
protocols; reachability analysis; execution tree; formal verification;
D O I：
10.1016/S0140-3664(99)00011-0
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
We adopt a formalism to describe protocols that is close to the human way of thinking and can be easily used to perform reachability analysis of the described protocol in a state-transition format. This formalism allows for an execution tree (ET) to be generated from a set of assertions such that all paths from the root to the leaves are well-defined formulas. We then extend the formalism with regards to real-time properties. Finally, we present a software verification tool, that implements the aforementioned features in the analysis of protocols. (C) 1999 Elsevier Science B.V. All rights reserved.
引用
收藏
页码：681 / 690
页数：10
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