FPGA Implementation of Dynamically Tunable Filters

被引：0

作者：

Senthilkumar, E. ^{[1
]}

Manikandan, J. ^{[2
]}

Agrawal, V. K. ^{[2
]}

机构：

[1] Karunya Univ, Elect & Instrumentat Engn, Tn, India

[2] PES Inst Technol, Crucible Res & Innovat CORI, Bangalore, Karnataka, India

来源：

2014 INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING, COMMUNICATIONS AND INFORMATICS (ICACCI) | 2014年

关键词：

FIR Filters; Tunable Filters; FPGA; Signal Processing;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

Digital Signal Processing techniques are extensively used in a large number of applications such as communication and multimedia and filtering concepts are considered as one of the basic elements needed for digital signal processing. This has motivated the design of digital filters for digital signal processors (DSPs) and Field Programmable Gate Arrays (FPGAs) based system design. The cut-off frequencies of these filters vary based on the requirements of application. In this paper, FPGA implementation of dynamically tunable Finite Impulse Response (FIR) filter is proposed, wherein the cut-off frequency can be dynamically changed on-the-fly without any need to program the FPGA. The proposed work is carried out to design high pass, low pass, band pass and band stop filters. The performance of the filters designed is evaluated for direct form structure and optimized structure using Virtex-5 FPGA board.

引用

页码：1852 / 1857

页数：6

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