Phase averaging and interpolation using resistor strings or resistor rings for multi-phase clock generation

被引:28
作者
Chou, Ju-Ming [1 ]
Hsieh, Yu-Tang [1 ]
Wu, Jieh-Tsorng [1 ]
机构
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu, Taiwan
关键词
averaging; clocks; delay-locked loops (DLLs); interpolation; phase-locked loops (PLLs);
D O I
10.1109/TCSI.2006.869905
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Circuit techniques using resistor strings (R-strings) and resistor rings (R-rings) for phase averaging and interpolation are described. Phase averaging can reduce phase errors, and phase interpolation can increase the number of available phases. In addition to the waveform shape, the averaging and the interpolation performances of the R-strings and R-rings are determined by the clock frequency normalized by a RC time constant of the circuits. To attain better phase accuracy, a smaller RC time constant is required, but at the expense of larger power dissipation. To demonstrate the resistor ring's capability of phase averaging and interpolation, a 125-MHz 8-bit digital-to-phase converter (DPC) was designed and fabricated using a standard 0.35-mu m SPQM CMOS technology. Measurement results show that the DPC attains 8-bit resolution using the proposed phase averaging and interpolation technique.
引用
收藏
页码:984 / 991
页数:8
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