Molded Chip Scale Package for high pin count

被引：5

作者：

Baba, S ^{[1
]}

Tomita, Y ^{[1
]}

Matsuo, M ^{[1
]}

Matsushima, H ^{[1
]}

Ueda, N ^{[1
]}

Nakagawa, O ^{[1
]}

机构：

[1] MITSUBISHI ELECTR CORP,MFG TECHNOL DIV,IC ASSEMBLY ENGN DEPT,ITAMI,HYOGO 664,JAPAN

来源：

46TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 1996 PROCEEDINGS | 1996年

关键词：

D O I：

10.1109/ECTC.1996.550895

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

A unique Molded Chip Scale Package (CSP) associated 1024 pin counts has been developed. The design and process have been optimized in order to achieve high mount density, enhanced electrical characteristic and cost competitiveness. Also, the reliability testing was performed on thermal cycling and moisture induced crack resistivity. Finally, enhanced electrical and thermal characteristics were calculated.

引用

页码：1251 / 1257

页数：3