Digital Spiking Neuron Cells for Real-Time Reconfigurable Learning Networks

被引:0
|
作者
Lin, Haipeng [1 ]
Zjajo, Amir [1 ]
van Leuken, Rene [1 ]
机构
[1] Delft Univ Technol, Circuits & Syst Grp, Delft, Netherlands
来源
2017 30TH IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC) | 2017年
关键词
Digital spiking neuron cells; neuron network; learning network; real-time data-flow architecture; INFORMATION; BURSTS; UNIT;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The high level of realism of spiking neuron networks and their complexity require a substantial computational resources limiting the size of the realized networks. Consequently, the main challenge in building complex and biologically-accurate spiking neuron network is largely set by the high computational and data transfer demands. In this paper, we implement several efficient models of the spiking neurons with characteristics such as axon conduction delays and spike timing-dependent plasticity. Experimental results indicate that the proposed real-time data-flow learning network architecture allows the capacity of over 2800 (depending on the model complexity) biophysically accurate neurons in a single FPGA device.
引用
收藏
页码:163 / 168
页数:6
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