OpenMP-based parallelization on an MPCore multiprocessor platform - A performance and power analysis

被引：12

作者：

Blume, H. ^{[1
]}

von Livonius, J. ^{[1
]}

Rotenberg, L. ^{[1
]}

Noll, T. G. ^{[1
]}

Bothe, H. ^{[2
]}

Brakensiek, J. ^{[2
]}

机构：

[1] Univ Aachen, Rhein Westfal TH Aachen, Chair Elect Engn & Comp Syst, D-52062 Aachen, Germany

[2] Nokia Res Ctr, D-44807 Bochum, Germany

来源：

JOURNAL OF SYSTEMS ARCHITECTURE | 2008年 / 54卷 / 11期

关键词：

Multicore processors; Parallelization; Power estimation; Optimization;

D O I：

10.1016/j.sysarc.2008.04.001

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this contribution, the potential of parallelized software that implements algorithms of digital signal processing on a multicore processor platform is analyzed. For this purpose various digital signal processing tasks have been implemented on a prototyping platform i.e. an ARM MPCore featuring four ARM11 processor cores. In order to analyze the effect of parallelization on the resulting performance-power ratio, influencing parameters like e.g. the number of issued program threads have been studied. For parallelization issues the OpenMP programming model has been used which can be efficiently applied on C-level. In order to elaborate power efficient code also a functional and instruction level power model of the MPCore has been derived which features a high estimation accuracy. Using this power model and exploiting the capabilities of OpenMP a variety of exemplary tasks could be efficiently parallelized. The general efficiency potential of parallelization for multiprocessor architectures can be assembled. (C) 2008 Elsevier B.V. All rights reserved.

引用

页码：1019 / 1029

页数：11

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