Stability and Performance Analysis of Low Power 6T SRAM Cell and Memristor Based SRAM Cell using 45NM CMOS Technology

In recent years, there has been a growing demand for low-power devices, due to the fact that the expansion of CMOS technology. Scale, the crystal size corresponds to the SOC storage phenomenon, system-on-chip (SOC), decreased by the number of transistors increased. Overall, the number of transistors in the number of transistors on a chip of information is used for various functions. They need economic, low energy consumption to promote the design capacity to increase, low power consumption and little memory because it plays an important role for the growth of the overall energy consumption device design parameters playing tight leakage power devices. Although it can be used any bit of the flip-flop - hitting the SRAM-type semiconductor SRAM: this memory is turned off to the loss of data in the conventional sense. It is used to compare the results of the memristor SRAM and SRAM. The calculation is simple memristor SRAM and SRAM based on the design parameters in 45nm technology, the Cadence tool.