Hardware implementation of carrier rotation strategy for Cascaded H-bridge Multilevel Inverters

Multicarrier pulse width modulation (MC-PWM) techniques such as Level-shifted PWM (LS-PWM) and Phase-shifted PWM (PS-PWM) are the popular methods to control the output voltage of Multilevel Inverters (MLIs). The advantage of LS-PWM techniques over PS-PWMs is that they produce better harmonic profile, but the un-equal power distribution problem of LS-PWMs imposes limitation to their usage in high power and medium voltage applications. For achieving the equal conduction periods and to evenly distribute the power among different cells, carrier rotation should be employed in LS-PWM. This paper proposes a carrier rotation strategy introduced to LS-PWM for producing the collective benefit of equal power distribution from PS-PWM and better harmonic profile from LS-PWM. MATALB/Simulink has been used to create simulation models and the experimental validations are performed by a hardware setup using dSPACE-DS1104 R&D Controller board. Furthermore, experimental results for power losses of individual cells, total harmonic distortions (THDs) in output voltages have been measured and compared with the obtained results of traditional LS-PWM techniques.