Design of High-PSRR Current-Mode Bandgap Reference with Improved Frequency Compensation

被引：0
|
作者：
Wang, Lidan [1 ,2 ]
Zhan, Chenchang [1 ]
Zhao, Shuangxing [1 ]
Cai, Guigang [1 ]
Liu, Yang [1 ]
Huang, Qiwei [1 ,3 ]
Li, Guofeng [2 ]
机构：
[1] Southern Univ Sci & Technol, Dept Elect & Elect Engn, Shenzhen, Peoples R China
[2] Nankai Univ, Coll Elect Informat & Opt Engn, Tianjin, Peoples R China
[3] Sogang Univ, Dept Elect Engn, Seoul, South Korea
来源：
2016 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2016年
关键词：
bandgap reference; current-mode; cascade current mirror; frequency compensation; power supply ripple rejection; stability; VOLTAGE REFERENCE;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, a current-mode bandgap reference (BGR) circuit with cascode current mirrors and improved frequency compensation for achieving high power supply ripple rejection (PSRR) is presented. By slightly modifying a conventional frequency compensation scheme, the PSRR of the BGR is significantly enhanced. PSRRs of the BGR with the two different compensation techniques have been formulated. To our knowledge, this is the first time in the literature of explicitly demonstrating how the PSRR is improved due to the frequency compensation. The feedback loop stability is also analyzed. The simulated PSRR of an example BGR using the modified compensation in a 0.18-mu m CMOS process is -108 dB, -68 dB, and -61 dB at DC, 10 kHz, and 10 MHz, respectively, with more than 40dB improvement at certain high frequency ranges over the design with the classical compensation.
引用
收藏
页码：410 / 413
页数：4
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