Design Steps Towards a 40-kVA SiC Inverter With an Efficiency Exceeding 99.5%

被引:0
作者
Rabkowski, Jacek [1 ]
Peftitsis, Dimosthenis [1 ]
Nee, Hans-Peter [1 ]
机构
[1] KTH Royal Inst Technol, Sch Elect Engn, SE-10044 Stockholm, Sweden
来源
2012 TWENTY-SEVENTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC) | 2012年
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes the concept, the design, the construction, and experimental investigation of a 40 kVA inverter with Silicon Carbide Junction Field Effect Transistors. The inverter was designed to have an efficiency exceeding 99.5%. Due to the low losses free convection cooling could be used. Since no fans are used the reliability can be increased compared to solutions with fans. A very low conduction loss has been achieved by parallel connecting ten 85 m Omega normally-on JFETs in each switch position. A special gate-drive solution was applied forcing the transistors to switch very fast (approx. 20 kV/mu s) resulting in very low switching losses. As the output power is almost equal to the input power a special effort was done to precisely determine the amount of semiconductor power losses via comparative thermal measurements. A detailed analysis of the measurements shows that the efficiency of the inverter is approximately 99.7% at 40 kVA.
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页码:1536 / 1543
页数:8
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