Development of Electrical Models of TFT-LCD Panels for Circuit Simulation

被引:0
作者
Park, Hyunwoo [1 ]
Kim, Soo Hwan [1 ]
Kim, Sung Ha [1 ]
Kim, Suki [1 ]
McCartney, Richard I.
机构
[1] Korea Univ, Seoul, South Korea
来源
IMID/IDMC 2006: THE 6TH INTERNATIONAL MEETING ON INFORMATION DISPLAY/THE 5TH INTERNATIONAL DISPLAY MANUFACTURING CONFERENCE, DIGEST OF TECHNICAL PAPERS | 2006年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
As the film transistor-liquid crystal display (TFT-LCD) panels become larger and provide higher resolution, the propagation delay of row, and column lines, the voltage modulation of Vcom, and the response time of liquid crystal affect the display images now more than in the past. It is more important to understand the electrical characteristic of TFT-LCD panels these days. This paper describes the electrical model of a 15-inch XGA (1024 x 768) TFT-LCD panel. The parasitic resistance and capacitance of its panel are obtained by 3D simulation of a sub pixel. The accuracy of these data is verified by the measured values in an actual panel [1]. The developed panel simulation platform, the equivalent circuit of a 15-inch XGA panel, is simulated by HSPICE. The results of simulation are compared with those of experiment, according to changing the width of OE signal. Especially, the proposed simulation plat form for modeling TFT-LCD panels can be applied to large size LCD TVs. It can help panel and circuit designers to verify their ideas without making actual panels and circuits.
引用
收藏
页码:733 / 738
页数:6
相关论文
共 5 条
  • [1] Aoki H., 1996, IEEE T ELECT DEVICES, V43
  • [2] KIM JH, IEEE T ADV PACKAGING, V24
  • [3] PARK HW, 2005, ANAL ROW COLUMN LINE
  • [4] RABAEY JM, 1996, DIGITAL INTEGRATED C, P471
  • [5] 2001, STAR HSPICE MANUAL