Reduction of interface traps at the amorphous-silicon/crystalline-silicon interface by hydrogen and nitrogen annealing

We show a reduction in the interface trap density (D-i iota) at the amorphous-silicon/crystalline-silicon interface by annealing in nitrogen (95%) and hydrogen (5%) for 10, 20 and 25 mm at 400 degrees C. Fabricated a-Si(n(+))/c-Si(p)/c-Si(p(+)) heterojunction solar cells were measured both in the dark and optically under 1 sun after annealing. The dark current reduces from similar to 9.5 x 10(-4) mA/cm(2) at -0.5 V to similar to 3.02 x 10(-5) mA/cm(2) after annealing for 25 mm at 400 degrees C. Under AM1.5G the open circuit voltage (V-oc) increases from 0.57 V to 0.62 V. The short circuit current density (J(sc)) increases from 12.1 mA/cm(2) to 13.2 mA/cm(2) and the fill-factor (FF) increases from 61.18% to 68.07%. The efficiency increases from 4.28% to 5.55%. The peak External Quantum Efficiency (EQE) increases from 55% to 63%. In addition, the Da profile at the a-Si/c-Si interface is modeled and simulated. Trap Assisted Tunneling (TAT) model along with electric field enhancement via the Poole Frenkel Effect is included as Electron-Hole-Pair (EHP) generation mechanisms. Combining the simulation and annealing results reveals a 90% reduction in D-i iota at the a-Si/c-Si interface. (C) 2013 Elsevier Ltd. All rights reserved.