Simulation of tunneling gate current in ultra-thin SOI MOSFETs

被引：0

作者：

Fiegna, C ^{[1
]}

Abramo, A ^{[1
]}

机构：

[1] Univ Ferrara, Dept Engn, I-44100 Ferrara, Italy

来源：

2001 INTERNATIONAL SEMICONDUCTOR DEVICE RESEARCH SYMPOSIUM, PROCEEDINGS | 2001年

关键词：

D O I：

10.1109/ISDRS.2001.984451

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Numerical simulation is applied to analyze the tunneling gate current of ultra-thin single-gate SOI MOSFETs. The results of the self-consistent solution of 1-D Schrodinger and Poisson equations show that, for very thin silicon layers, the gate tunneling currents depend on the thickness of the silicon region because this significantly affects the 2-D subband structure in the inversion layer.

引用

页码：110 / 113

页数：4

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