Design of an Optimal Layout Polyphase Filter for Millimeter-Wave Quadrature LO Generation

被引：52

作者：

Kulkarni, Shailesh ^{[1
]}

Zhao, Dixian ^{[1
]}

Reynaert, Patrick ^{[1
]}

机构：

[1] Katholieke Univ Leuven, Dept Elect Engn ESAT, Microelect & Sensors Div MICAS, B-3001 Louvain, Belgium

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2013年 / 60卷 / 04期

基金：

欧洲研究理事会;

关键词：

Image rejection; millimeter-wave; optimal layout; polyphase filter (PPF); quadrature generation; 60; GHz; RECEIVER FRONT-END; TRANSMITTER; TRANSCEIVER;

D O I：

10.1109/TCSII.2013.2251946

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The analysis and design of a two-stage passive RC polyphase filter for millimeter-wave quadrature local oscillator generation is presented. The layout parasitics, which significantly deteriorate the filter performance at millimeter-wave frequencies, are identified with the help of impedance variation and transfer function analysis. To alleviate this parasitic degradation, a new optimal layout structure along with parasitic-compensation technique is proposed, which results in a 15-dB improvement in image rejection ratio, as compared with a conventional layout. Using the proposed techniques, more than 35 dB of image rejection over a bandwidth of 7 GHz is demonstrated in an outphasing transmitter at 60 GHz in 40-nm CMOS.

引用

页码：202 / 206

页数：5

共 15 条

[1] CMOS mixers and polyphase filters for large image rejection [J].

Behbahani, F ;

Kishigami, Y ;

Leete, J ;

Abidi, AA .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2001, 36 (06) :873-887

[2] A 60-GHz Band 2 x 2 Phased-Array Transmitter in 65-nm CMOS [J].

Chan, Wei L. ;

Long, John R. .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2010, 45 (12) :2682-2695

[3] A single-chip 900 MHz CMOS receiver front-end with a high performance low-IF topology [J].

Crols, J ;

Steyaert, MSJ .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1995, 30 (12) :1483-1492

[4]

Forstner H. P., 2011, 2011 IEEE 11th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2011), P129, DOI 10.1109/SIRF.2011.5719318

[5] Analysis and Design of Passive Polyphase Filters [J].

Kaukovuori, Jouni ;

Stadius, Kari ;

Ryynaenen, Jussi ;

Halonen, Kari A. I. .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2008, 55 (10) :3023-3037

[6] A 1.3-degree I/Q Phase Error, 7.1-8.7-GHz LO Generator with Single-Stage Digital Tuning Polyphase Filter [J].

Kodama, Hiroshi ;

Ishikawa, Hiromu ;

Oshima, Naoki ;

Tanaka, Akio .

2010 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2010, :145-146

[7] A 90 nm CMOS Low-Power 60 GHz Transceiver With Integrated Baseband Circuitry [J].

Marcu, Cristian ;

Chowdhury, Debopriyo ;

Thakkar, Chintan ;

Park, Jung-Dong ;

Kong, Ling-Kai ;

Tabesh, Maryam ;

Wang, Yanjie ;

Afshar, Bagher ;

Gupta, Abhinav ;

Arbabian, Amin ;

Gambini, Simone ;

Zamani, Reza ;

Alon, Elad ;

Niknejad, Ali M. .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (12) :3434-3447

[8] A 5.2-GHz GaInP/GaAs HBT double-quadrature downconverter with polyphase filters for 40-dB image rejection [J].

Meng, CC ;

Sung, DW ;

Huang, GW .

IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2005, 15 (02) :59-61

[9] 60GHz Quadrature Signal Generation with a Single Phase VCO and Polyphase Filter in a 0.25μm SiGe BiCMOS technology [J].

Notten, M. G. M. ;

Veenstra, H. .

PROCEEDINGS OF THE 2008 BIPOLAR/BICMOS CIRCUITS AND TECHNOLOGY MEETING, 2008, :178-181

[10] A New Transceiver Architecture for the 60-GHz Band [J].

Parsa, Ali ;

Razavi, Behzad .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2009, 44 (03) :751-762

← 1 2 →