Hardware Implementation of Template Matching Algorithm and its Performance Evaluation

被引:0
作者
Satish, B. [1 ]
Jayakrishnan, P. [1 ]
机构
[1] VIT Univ, Sch Elect Engn, VLSI Div, Vellore, Tamil Nadu, India
来源
2017 INTERNATIONAL CONFERENCE ON MICROELECTRONIC DEVICES, CIRCUITS AND SYSTEMS (ICMDCS) | 2017年
关键词
Sum of Absolute Differences; Template Matching; FPGA;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Object Recognition is used to identify the object in the form of a video sequence or an image inside a video sequence or an image. The main objective of the Object Recognition is to correctly find the objects in the image or video sequence. There are different techniques are available to match the area. The goal is to identify the similar object or exact object in the input image. Template Matching Algorithm is used to detect and recognize an object using Optimized Sum of Absolute Differences (OSAD). In the proposed method, it does not suffer from the illumination issues. It got high performance compare to other technique. It is verified in Matlab, Simulink and Verilog. For the hardware simulation, Copies the output image pixel values from Verilog to text file and give it to the matlab and displays the detected object on the image. It is verified by using the FPGA Board (Arria 10 Device Family) and got the output less than 4ms.
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页数:7
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