Fast Floorplanning With Placement Constraints

被引：0

作者：

Pinge, Shantesh ^{[1
]}

Nain, Rajeev K. ^{[1
]}

Chrzanowska-Jeske, Malgorzata ^{[1
]}

机构：

[1] Portland State Univ, Dept Elect & Comp Engn, Portland, OR 97207 USA

来源：

2013 IEEE 4TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS) | 2013年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Today's deep sub-micron technology and large complex designs have elevated the need for floorplanning to handle placement constraints. We present a unified method to handle alignment and cluster constraints on sequence pair representation. It helps pruning infeasible solutions on sequence pair and significantly reduces the solution space, therefore speeding up the algorithm. We also present an implementation methodology for fast evaluation of these constraints. Experimental results on MCNC and GSRC benchmarks demonstrate that our approach is 4.6X faster on average, scalable with good packing as compared to other published approaches.

引用

页数：4

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