Remotely Configurable Fault-Tolerant FPGA-based Pacemaker

被引：0
作者：
Alkady, Gehad I. [1 ]
Amer, Hassanein H. [1 ]
Daoud, Ramez M. [1 ]
机构：
[1] Amer Univ Cairo, Elect & Commun Engn Dept, Cairo, Egypt
来源：
2017 12TH INTERNATIONAL CONFERENCE ON COMPUTER ENGINEERING AND SYSTEMS (ICCES) | 2017年
关键词：
Pacemaker; FPGA; Dynamic Partial Reconfiguraton (DPR); Fault-Tolerance; Reliability; Sift-Out; Duplication With Comparison (DWC); Markov Model; Remote Monitoring;
D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
The Pacemaker is the most famous Implantable Medical Devices which is used in treating bradycardia and tachycardia. The pulse generator is the brain of the pacemaker; accordingly, it should be implemented using a powerful flexible platform. In this paper, an FPGA-based pulse generator is implemented. The Dynamic Partial Reconfiguration (DPR) property of FPGAs is used to allow the remote change of the operational mode of the pacemaker. A pacemaker is a real time critical system; therefore, it must be very reliable. Accordingly, Fault-Tolerant techniques should be applied to the FPGA-based pulse generator. Two Fault-Tolerant techniques are under investigation: two Duplication With comparison (DWC) circuits and Sift-out. The fault model used is Single Event Upsets (SEUs). Remote recovery takes place using DPR. Markov Models are used for reliability calculations. Results show that the Sift-Out technique is more reliable than the two DWC one.
引用
收藏
页码：19 / 24
页数：6
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