Design of Low-power 4-bit Flash ADC Using Multiplexer Based Encoder in 90nm CMOS Process

被引：1

作者：

Sam, D. S. Shylu ^{[1
]}

Paul, P. Sam ^{[1
]}

Jingle, Diana Jeba ^{[2
]}

Paul, P. Mano ^{[3
]}

Samuel, Judith ^{[1
]}

Reshma, J. ^{[1
]}

Sarah, P. ^{[1
]}

Evangeline, Sudeepa G. ^{[1
]}

机构：

[1] Karunya Inst Technol & Sci, Coimbatore, India

[2] Christ Deemed Univ, Bangalore, India

[3] Alliance Univ, Bangalore, India

来源：

INTERNATIONAL JOURNAL OF ELECTRONICS AND TELECOMMUNICATIONS | 2022年 / 68卷 / 03期

关键词：

FLASH ADC; Low Power; Dynamic Comparator; Encoder;

D O I：

10.24425/ijet.2022.141275

中图分类号：

TN [电子技术、通信技术];

学科分类号：

0809 ;

摘要：

This work describes a 4-bit Flash ADC with low power consumption. The performance metrics of a Flash ADC depend on the kind of comparator and encoder used. Hence openloop comparator and mux-based encoder are used to obtain improved performance. Simulation results show that the simulated design consumes 0.265mW of power in 90nm CMOS technology using cadence-virtuoso software. The circuit operates with an operating frequency of 100MHz and a supply voltage of 1V.

引用

页码：565 / 570

页数：6

共 50 条

[21] A 4 bit Low Power Process Tolerant Flash ADC in 0.18μm CMOS
Malathi, D.
Sanjay, R.
Greeshma, R.
Venkataramani, B.
2015 3RD INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING, COMMUNICATION AND NETWORKING (ICSCN), 2015,
[22] A 4-bit, 3.2 GSPS Flash Analog to Digital Converter with a new multiplexer based encoder
Gupta, Yogendra
Garg, Lokesh
Khandelwal, Sarthak
Gupta, Sanchit
Jain, Surabhi
Saini, Sandeep
2014 11TH INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING/ELECTRONICS, COMPUTER, TELECOMMUNICATIONS AND INFORMATION TECHNOLOGY (ECTI-CON), 2014,
[23] Design of Low-Power Bulk-Driven Balanced OTA in 90nm CMOS Technology
Jusoh, Wan Mohammad Ehsan Aiman bin Wan
Ruslan, Siti Hawa
2018 IEEE STUDENT CONFERENCE ON RESEARCH AND DEVELOPMENT (SCORED), 2018,
[24] . Mixed style of Low Power Multiplexer Design for Arithmetic Architectures using 90nm Technology
Vijayakumar, S.
Karthikeyan, B.
RECENT ADVANCES IN NETWORKING, VLSI AND SIGNAL PROCESSING, 2010, : 83 - +
[25] Improved low-power low-voltage CMOS comparator for 4-bit flash adcs for uwb applications
Oliveira, J. P.
Goes, J.
Paulino, N.
Fernandes, J.
MIXDES 2007: PROCEEDINGS OF THE 14TH INTERNATIONAL CONFERENCE ON MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS:, 2007, : 293 - 296
[26] A low power 1.8 V 4-bit 400-MHz flash ADC in 0.18μ digital CMOS
Banik, S
Gangopadhyay, D
Bhattacharyya, TK
19TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2005, : 69 - 74
[27] A new architecture of Thermometer to Binary code encoder for 4 - bit FLASH ADC in 45nm CMOS process
Sam, D. S. Shylu
Paul, P. Sam
Reddy, Golamari Kiran Kumar
Manideep, Nagothu
Venkatesh, Nethikuntla Chakali
Manideep, Pulikonda Durga Sai
PRZEGLAD ELEKTROTECHNICZNY, 2023, 99 (11): : 188 - 191
[28] A kick-back reduced comparator for a 4-6-bit 3-GS/s flash ADC in a 90nm CMOS process
Sundstrom, T.
Alvandpour, A.
MIXDES 2007: PROCEEDINGS OF THE 14TH INTERNATIONAL CONFERENCE ON MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS:, 2007, : 195 - 198
[29] 1.5GSPS 4-bit flash ADC using 0.18μm CMOS
Shehata, Khaled Ali
Husien, Hanady
Ragai, Hani Fekri
2007 INTERNATIONAL CONFERENCE ON MICROELECTRONICS, 2007, : 122 - +
[30] A 0.6-to-1V Inverter-Based 5-bit Flash ADC in 90nm Digital CMOS
Proesel, Jonathan E.
Pileggi, Lawrence T.
PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2008, : 153 - 156

← 1 2 3 4 5 →