Process, Assembly and Electromigration Characteristics of Glass Interposer for 3D Integration

被引:0
作者
Chien, Chun-Hsien [1 ]
Lee, Ching-Kuan [1 ]
Lin, Chun-Te [1 ]
Lin, Yu-Min [1 ]
Zhan, Chau-Jie [1 ]
Chang, Hsiang-Hung [1 ]
Hsu, Chao-Kai [1 ]
Fu, Huan-Chun [1 ]
Shen, Wen-Wei [1 ]
Huang, Yu-Wei [1 ]
Ko, Cheng-Ta [1 ]
Lo, Wei-Chung [1 ]
Lu, Yung Jean [2 ]
机构
[1] Ind Technol Res Inst ITRI, Elect & Optoelect Res Labs EOL, Hsinchu, Taiwan
[2] Corning Inc, Washington, DC USA
来源
2014 IEEE 64TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC) | 2014年
关键词
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Glass interposer is proposed as a superior alternative to organic and silicon-based interposers for 3DIC packaging in the near future. Because glass is an excellent dielectric material and could be fabricated with large size, it provides several attractive advantages such as excellent electrical isolation, better RF performance, better feasibility with CTE and most importantly low cost solution. In this paper, we investigated the EM performance of Cu RDL line with glass substrate. Three different physical properties of glass materials were used for studying the EM performance of Cu RDL line. The used testing conditions are under 150 similar to 170 degrees C and 300 similar to 500mA. The glass type material with best performance was applied for glass interposer process integration and assembly investigation. Therefore, a wafer-level 300mm glass interposer scheme with topside RDLs, Cu TGVs, bottom side RDLs, Cu/Sn micro-bump and PBO passivation has been successfully developed and demonstrated in the study. The chip stack modules with glass interposer were assembled to evaluate their electrical characteristics. Pre-conditioning test was performed on the chip stacking module with the glass interposer to assess the reliability of the heterogeneous 3D integration scheme. All the results indicate that the glass interposer with polymer passivation can be successfully integrated with lower cost processes and assembly has been successfully developed and demonstrated in the study.
引用
收藏
页码:1891 / 1895
页数:5
相关论文
共 6 条
[1]   ELECTROMIGRATION FAILURE MODES IN ALUMINUM METALLIZATION FOR SEMICONDUCTOR DEVICES [J].
BLACK, JR .
PROCEEDINGS OF THE IEEE, 1969, 57 (09) :1587-&
[2]  
Garrou P., 2009, SEMICONDUCTOR INT
[3]  
Lai YS, 2011, ELEC COMP C, P326, DOI 10.1109/ECTC.2011.5898533
[4]   Through-Package-Via Formation and Metallization of Glass Interposers [J].
Sukumaran, Vijay ;
Chen, Qiao ;
Liu, Fuhan ;
Kumbhat, Nitesh ;
Bandyopadhyay, Tapobrata ;
Chan, Hunter ;
Min, Sunghwan ;
Nopper, Christian ;
Sundaram, Venky ;
Tummala, Rao .
2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, :557-563
[5]  
Yannou J.-M, 2007, Advancing Microelectronics, V34, P16
[6]  
Young M., 1989, The Technical Writer's Handbook