Noise optimization of an inductively degenerated CMOS low noise amplifier

被引：176
作者：
Andreani, P [1 ]
Sjöland, H [1 ]
机构：
[1] Lund Univ, Dept Electrosci, SE-22100 Lund, Sweden
来源：
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING | 2001年 / 48卷 / 09期
关键词：
CMOS; gate-induced current noise; LNA; noise; RF;
D O I：
10.1109/82.964996
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a technique for substantially reducing the noise of a CMOS low noise amplifier implemented in the inductive source degeneration topology. The effects of the gate induced current noise on the noise performance are taken into account, and the total output noise is strongly reduced by inserting a capacitance of appropriate value in parallel with the amplifying MOS transistor of the LNA. As a result, very low noise figures become possible already at very low power consumption levels.
引用
收藏
页码：835 / 841
页数：7
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