Estimation of the Single-Event Upset Sensitivity of Advanced SOI SRAMs

被引:22
作者
Raine, M. [1 ]
Gaillardin, M. [1 ]
Lagutere, T. [1 ]
Duhamel, O. [1 ]
Paillet, P. [1 ]
机构
[1] CEA, DAM, DIF, F-91297 Arpajon, France
关键词
Experiments; FinFET; particle-matter interaction; single-event effects (SEE); simulation; single-event upset (SEU); static random access memories (SRAMs); technology computer aided design (TCAD); ultra-thin silicon on insulator (UTSOI); HEAVY-ION; CHARGE; SIMULATION; DEVICES; IRRADIATION; TECHNOLOGY; ENERGY; GEANT4; SETS; SEU;
D O I
10.1109/TNS.2017.2779786
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The single-event upset (SEU) sensitivity of ultrathin silicon on insulator (SOI), SOI FinFET, and NanoWireFET static random access memories (SRAMs) is investigated using a straightforward multiple-scale approach based on open source and commercial codes. Both Monte-Carlo and technology computer aided design (TCAD) tools are used to estimate the SEU cross section of innovative technologies. Heavy-ion experiments performed on transistors are used to validate TCAD models and 3-D device structures. TCAD simulations are then performed on 3-D SRAM cells to calculate the upset threshold for each technology. It is used as upset criterion in Monte-Carlo simulations of deposited energy in silicon microvolumes to estimate the SEU cross section of innovative SOI technologies. Finally, multiple-bit upsets are addressed to draw trends on the sensitivity of such highly scaled technologies to multiple events.
引用
收藏
页码:339 / 345
页数:7
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