Preconditioned Conjugate Gradient Acceleration on FPGA-Based Platforms

被引：3

作者：

Malakonakis, Pavlos ^{[1
]}

Isotton, Giovanni ^{[2
]}

Miliadis, Panagiotis ^{[3
]}

Alverti, Chloe ^{[3
]}

Theodoropoulos, Dimitris ^{[3
]}

Pnevmatikatos, Dionisios ^{[3
]}

Ioannou, Aggelos ^{[4
]}

Harteros, Konstantinos ^{[5
]}

Georgopoulos, Konstantinos ^{[1
]}

Papaefstathiou, Ioannis ^{[5
]}

Mavroidis, Iakovos ^{[1
]}

机构：

[1] Telecommun Syst Inst TSI, Khania 73100, Greece

[2] M3E Srl, I-35129 Padua, Italy

[3] Inst Commun & Comp Syst, 9 Iroon Polytech Str, Zografos 15773, Greece

[4] Aristotle Univ Thessaloniki, Sch ECE, Thessaloniki 54124, Greece

[5] EXAPSYS, Thessaloniki 54124, Greece

来源：

ELECTRONICS | 2022年 / 11卷 / 19期

基金：

欧盟地平线“2020”;

关键词：

high-performance computing; field-programmable gate array; algorithmic acceleration; reconfigurable computing;

D O I：

10.3390/electronics11193039

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Reconfigurable computing can significantly improve the performance and energy efficiency of many applications. However, FPGA-based chips are evolving rapidly, increasing the difficulty of evaluating the impact of new capabilities such as HBM and high-speed links. In this paper, a real-world application was implemented on different FPGAs in order to better understand the new capabilities of modern FPGAs and how new FPGA technology improves performance and scalability. The aforementioned application was the preconditioned conjugate gradient (PCG) method that is utilized in underground analysis. The implementation was done on four different FPGAs, including an MPSoC, taking into account each platform's characteristics. The results show that today's FPGA-based chips offer eight times better performance on a memory-bound problem than 5-year-old FPGAs, as they incorporate HBM and can operate at higher clock frequencies.

引用

页数：15

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