Network-on-Chip Implementation of Midimew-Connected Mesh Network

被引:2
作者
Awal, Md Rabiul [1 ]
Rahman, M. M. Hafizur [1 ]
机构
[1] IIUM, KICT, Dept Comp Sci, Kuala Lumpur, Malaysia
来源
2013 INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED COMPUTING, APPLICATIONS AND TECHNOLOGIES (PDCAT) | 2013年
关键词
MMN; Interconnection Network; Network on Chip; System on Chip; Midimew;
D O I
10.1109/PDCAT.2013.48
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Architecture of interconnection network plays a significant role in the performance and energy consumption of Network-on-Chip (NoC) systems. In this paper we propose NoC implementation of Midimew-connected Mesh Network (MMN). MMN is a Minimal Distance Mesh with Wrap-around (Midimew) links network of multiple basic modules, in which the basic modules are 2D-mesh networks that are hierarchically interconnected for higher-level networks. For implementing all the links of level-3 MMN, minimum 4 layers are needed which is feasible with current and future VLSI technologies. With innovative combination of diagonal and hierarchical structure, MMN possesses several attractive features including constant node degree, small diameter, low cost, small average distance, and moderate bisection width than that of other conventional and hierarchical interconnection networks.
引用
收藏
页码:265 / 271
页数:7
相关论文
共 50 条
  • [31] A survey of research and practices of network-on-chip
    Bjerregaard, Tobias
    Mahadevan, Shankar
    ACM COMPUTING SURVEYS, 2006, 38 (01) : 1 - 51
  • [32] HM-Mesh: Energy Efficient Hybrid Multiple Network-on-Chip
    Wu, Ji
    Dong, Dezun
    Wang, Li
    2016 INTERNATIONAL SYMPOSIUM ON COMPUTER, CONSUMER AND CONTROL (IS3C), 2016, : 404 - 407
  • [33] Design and Implementation of a Hybrid Switching Router for the Reconfigurable Network-on-Chip
    Nguyen, Hung K.
    Xuan-Tu Tran
    PROCEEDINGS OF THE 2016 INTERNATIONAL CONFERENCE ON ADVANCED TECHNOLOGIES FOR COMMUNICATIONS (ATC), 2016, : 328 - 333
  • [34] A Reliability Aware Application Mapping onto Mesh based Network-on-Chip
    Chatterjee, Navonil
    Reddy, Sheshivardhan
    Reddy, Shilpa
    Chattopadhyay, Santanu
    2016 3RD INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN INFORMATION TECHNOLOGY (RAIT), 2016, : 537 - 542
  • [35] On the design of hybrid routing mechanism for mesh-based network-on-chip
    Yaghini, Pooria M.
    Eghbal, Ashkan
    Bagherzadeh, Nader
    INTEGRATION-THE VLSI JOURNAL, 2015, 50 : 183 - 192
  • [36] Core/Task Associations For Efficient Application Implementation On Network-On-Chip
    Bougherara, Maamar
    Nedjah, Nadia
    Bennouar, Djamel
    Rahmoun, Rym
    Sadok, Amel
    Mourelle, Luiza de Macedo
    2018 INTERNATIONAL CONFERENCE ON COMPUTER AND APPLICATIONS (ICCA), 2018, : 18 - 22
  • [37] An Enhanced Fault-Tolerant Routing Algorithm for Mesh Network-on-Chip
    Rezazadeh, Arshin
    Fathy, Mahmood
    Rahnavard, Gholamali
    2009 INTERNATIONAL CONFERENCE ON EMBEDDED SOFTWARE AND SYSTEMS, PROCEEDINGS, 2009, : 505 - +
  • [38] ISO/OSI compliant network-on-chip implementation for CNN applications
    Malki, S
    Hansson, A
    Spaanenburg, L
    Åkesson, B
    BIOENGINEERED AND BIOINSPIRED SYSTEMS II, 2005, 5839 : 341 - 352
  • [39] A Network-on-Chip Router for Deadlock-Free Multicast Mesh Routing
    Rampal, Ritesh
    Chandel, Rajeevan
    Daniel, Philemon
    2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, COMPUTING AND COMMUNICATION TECHNOLOGIES (CONECCT), 2015,
  • [40] A Minimal Network Interface for a Simple Network-on-Chip
    Schoeberl, Martin
    Pezzarossa, Luca
    Sparso, Jens
    ARCHITECTURE OF COMPUTING SYSTEMS - ARCS 2019, 2019, 11479 : 295 - 307