Bias-Voltage-Dependent Subcircuit Model for Millimeter-Wave CMOS Circuit

被引：7

作者：

Katayama, Kosuke ^{[1
]}

Motoyoshi, Mizuki ^{[1
]}

Takano, Kyoya ^{[1
]}

Fujimoto, Ryuichi ^{[2
]}

Fujishima, Minoru ^{[1
]}

机构：

[1] Hiroshima Univ, Grad Sch Adv Sci Matter, Higashihiroshima 7398530, Japan

[2] Semicond Co, Toshiba Corp, Kawasaki, Kanagawa 2128520, Japan

来源：

IEICE TRANSACTIONS ON ELECTRONICS | 2012年 / E95C卷 / 06期

关键词：

parameter extraction; MOSFET modeling; millimeter wave; DESIGN; GHZ;

D O I：

10.1587/transele.E95.C.1077

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we propose a new method for the bias-dependent parameter extraction of a MOSFET, which covers DC to over 100 GHz. The DC MOSFET model provided by the chip foundry is assumed to be correct, and the core DC characteristics are designed to be asymptotically recovered at low frequencies. This is carried out by representing the corrections required at high frequencies using a bias-dependent Y matrix, assuming that a parasitic nonlinear two-port matrix (Y-wrapper) is connected in parallel with the core MOSFET. The Y-wrapper. can also handle the nonreciprocity of the parasitic components, that is, the asymmetry of the Y matrix. The reliability of the Y-wrapper model is confirmed through the simulation and measurement of a one-stage common-source amplifier operating at several bias points. This paper will not discuss about non-linearity.

引用

页码：1077 / 1085

页数：9

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