Testability Design Based on Relevance of Circuit Nodes and Fault Diagnosis

被引:0
|
作者
Chen, Liying [1 ]
Zhai, Guofu [1 ]
Ye, Xuerong [1 ]
Zhang, Kaixin [1 ]
Zhao, Wei [2 ]
机构
[1] Harbin Inst Technol, Sch Elect Engn & Automat, Harbin, Heilongjiang, Peoples R China
[2] State Grid Jibei Elect Power Co Ltd, Maintence Branch, Beijing, Peoples R China
基金
中国国家自然科学基金;
关键词
board-level circuits; testability design; selection of test points; fault diagnosis; ANALOG; SELECTION;
D O I
暂无
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
As an important part of electronic products and systems, the fault prediction and health management of board-level circuits has attracted wide attention and the testability design is the basis of the related studies. In this paper, a new method of testability design based on the correlation of circuit nodes is proposed and used to realize the selection of test points in a high-voltage power supply. First of all, all nodes in the circuit are grouped based on correlation analysis, and then calculate the distance between the fault class according to the existing fault data to select the test points of the circuit. Finally, extract the fault features of the selected test points and diagnose the fault. The results verifies the effectiveness of the proposed method in this paper.
引用
收藏
页码:1159 / 1163
页数:5
相关论文
共 50 条
  • [1] Analog Circuit Testability for Fault Diagnosis
    Cai, Jinyan
    Han, Chunhui
    Meng, Yafeng
    Tsinghua Science and Technology, 2007, 12 (SUPPL. 1): : 270 - 274
  • [2] NODE-FAULT DIAGNOSIS AND A DESIGN OF TESTABILITY
    HUANG, ZF
    LIN, CS
    LIU, RW
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1983, 30 (05): : 257 - 265
  • [4] Multiple Stuck-at Fault Testability Analysis of ROBDD Based Combinational Circuit Design
    Toral Shah
    Anzhela Matrosova
    Masahiro Fujita
    Virendra Singh
    Journal of Electronic Testing, 2018, 34 : 53 - 65
  • [5] Multiple Stuck-at Fault Testability Analysis of ROBDD Based Combinational Circuit Design
    Shah, Toral
    Matrosova, Anzhela
    Fujita, Masahiro
    Singh, Virendra
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2018, 34 (01): : 53 - 65
  • [6] Overview of design of testability and dot based fault diagnosis strategy for complex systems
    Lu N.
    Li Y.
    Jiang B.
    Huang S.
    Ma K.
    Xi Tong Gong Cheng Yu Dian Zi Ji Shu/Systems Engineering and Electronics, 2024, 46 (07): : 2359 - 2373
  • [7] A virtual test-bench for analog circuit testability analysis and fault diagnosis
    Chakrabarty, S
    Rajan, V
    Ying, J
    Mansjur, M
    Pattipati, K
    Deb, S
    1998 IEEE AUTOTESTCON PROCEEDINGS - IEEE SYSTEMS READINESS TECHNOLOGY CONFERENCE, 1998, : 337 - 352
  • [8] Simulation-based testability analysis and fault diagnosis
    Sen, SJ
    Nath, SS
    Malepati, VN
    Pattipati, KR
    AUTOTESTCON '96 - THE SYSTEM READINESS TECHNOLOGY CONFERENCE: TEST TECHNOLOGY AND COMMERCIALIZATION, CONFERENCE RECORD, 1996, : 136 - 148
  • [9] Optimum Design of Circuit Fault Diagnosis Software Based on Fault Dictionary Method
    Su Wei
    Fan Tongshun
    Wang Yuping
    2008 INTERNATIONAL SYMPOSIUM ON INTELLIGENT INFORMATION TECHNOLOGY APPLICATION WORKSHOP: IITA 2008 WORKSHOPS, PROCEEDINGS, 2008, : 749 - 752
  • [10] Design of electronic circuit fault diagnosis based on artificial intelligence
    Tao, Yumei
    INTERNATIONAL JOURNAL OF BIOMETRICS, 2022, 14 (02) : 191 - 198