A Physical Design Tool for Carbon Nanotube Field-Effect Transistor Circuits

被引：17
作者：
Huang, Jiale [1 ]
Zhu, Minhao [1 ]
Yang, Shengqi [1 ]
Gupta, Pallav [3 ]
Zhang, Wei [2 ]
Rubin, Steven M.
Garreton, Gilda
He, Jin [4 ]
机构：
[1] Shanghai Univ, Shanghai 200041, Peoples R China
[2] Nanyang Technol Univ, Singapore 639798, Singapore
[3] Intel Corp, Santa Clara, CA 95051 USA
[4] Peking Univ, Beijing, Peoples R China
来源：
ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS | 2012年 / 8卷 / 03期
关键词：
Design; Experimentation; Performance; Carbon nanotube field-effect transistor; physical design; computer-aided design; electronic design automation; COMPACT SPICE MODEL; INCLUDING NONIDEALITIES; ALIGNED ARRAYS;
D O I：
10.1145/2287696.2287708
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this article, we present a graphical Computer-Aided Design (CAD) environment for the design, analysis, and layout of Carbon NanoTube (CNT) Field-Effect Transistor (CNFET) circuits. This work is motivated by the fact that such a tool currently does not exist in the public domain for researchers. Our tool has been integrated within Electric a very powerful, yet free CAD system for custom design of Integrated Circuits (ICs). The tool supports CNFET schematic and layout entry, rule checking, and HSpice/VerilogA netlist generation. We provide users with a customizable CNFET technology library with the ability to specify lambda-based design rules. We showcase the capabilities of our tool by demonstrating the design of a large CNFET standard cell and components library. Meanwhile, HSPICE simulations also have been presented for cell library characterization. We hope that the availability of this tool will invigorate the CAD community to explore novel ideas in CNFET circuit design.
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页数：20
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