Static Minimization of Total Energy Consumption in Memory Subsystem for Scratchpad-Based Systems-on-Chips

被引：14

作者：

Menichelli, F. ^{[1
]}

Olivieri, M. ^{[1
]}

机构：

[1] Univ Roma La Sapienza, Dept Elect Engn, I-00184 Rome, Italy

来源：

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | 2009年 / 17卷 / 02期

关键词：

Leakage power consumption in CMOS devices; low power embedded systems; memory subsystem optimization; scratchpad memory;

D O I：

10.1109/TVLSI.2008.2001940

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In VLSI systems-on-chips (SoC), leakage is expected to override 50% of the total power consumption, and the memory sub-system can be responsible for up to 75% of the power. Scratch-pad memories (SPM) are a proven alternative to cache memories in power-aware SoCs. Optimal SPM mapping has already been investigated for dynamic power reduction in the main memory and for leakage reduction in the SPM itself. This paper addresses the problem of global energy optimization (i.e., active + leakage) in the whole memory sub-system of tin SPM-based SoC. We focus on SPMs dedicated to instructions and constant data. We present the technology-level foundation, the mathematical problem formulation, its solution as an integer-linear-programming (ILP) problem, the implemented design flow, and the power reduction results referring to standard benchmarks and ITRS technology data.

引用

页码：161 / 171

页数：11

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