Logic-embedded Physically Unclonable Functions for Synthesizable and Periphery-free Implementation for Low Area and Design Cost IoT Security

Novel logic-embedded physically unclonable functions (Logic-ePUF) are proposed to significantly reduce design/area cost with minimal modification on standard cells used for semi-custom design flow. By replacing scan flip-flops and buffers in scan chain with proposed flip-flop-ePUF (FF-ePUF) and buffer-ePUF (BUF-ePUF), efficient PUF implementation is enabled without additional readout periphery. The proposed Logic-ePUF not only operates as a standard cell but also as a PUF. To generate secure key, proposed Logic-ePUF operates under PUF mode by comparing the difference of switching voltages (VM) of 1st and 2nd stage inverters. The proposed FF-ePUF and BUF-ePUF are fabricated in 28nm FDSOI process to evaluate effectiveness and performance. The proposed FF-ePUF achieved 178ppm BER through reconfiguration and tilting with 332-447F(2)/bit area overhead. And the proposed BUF-ePUF reduced 41% of area overhead compared to conventional method.