A Tool for VLIW Processors Code Optimizing

被引：0
|
作者：
Mego, Roman [1 ]
Fryza, Tomas [1 ]
机构：
[1] Brno Univ Technol, Dept Radio Elect, Brno, Czech Republic
来源：
PROCEEDINGS OF 2018 13TH INTERNATIONAL CONFERENCE ON COMPUTER ENGINEERING AND SYSTEMS (ICCES) | 2018年
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
The paper demonstrates the behavior of low- and high-level programming languages on the multicore digital signal processors based on Very Long Instruction Word architecture. The aim of the paper is to present a tool that can be used to implement any digital signal processing algorithm on such processors with efficiency of the low-level languages, but with the advantages of the high-level programming languages. Preliminary result is the software that uses a signal-flow graph approach to describe an algorithm, generates low-level assembly code and provides (graphical) information about the algorithm.
引用
收藏
页码：601 / 604
页数：4
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