Wireless Alarm System Basing on FPGA and SOPC

被引：0

作者：

Wan, Yuemin ^{[1
]}

Wang, Xiaoping ^{[1
]}

Xing, Lei ^{[2
]}

Zhang, Peng ^{[1
]}

机构：

[1] Shijiazhuang TieDao Univ, Dept Elect & Elect Engn China, Shijiazhuang, Peoples R China

[2] Beijing Railway Bur, BeiJing PDL Infrastructure Maintenance, Beijing, Peoples R China

来源：

PROCEEDINGS OF THE 2011 INTERNATIONAL CONFERENCE ON INFORMATICS, CYBERNETICS, AND COMPUTER ENGINEERING (ICCE2011), VOL 1: INTELLIGENT CONTROL AND NETWORK COMMUNICATION | 2011年 / 110卷 / 01期

关键词：

wireless alarm; FPGA; SOPC; Nios II;

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

The sending system designed basing on FPGA (Field Programmable Gate Array) is great reliable, and includes the coding control circuit, modulation circuit, power amplifier circuit and the launching of circuit. The receiving system designed to SOPC (System on a Programmable Chip) as the core is good flexible and includes the power amplifier circuit, the demodulated circuit. the alarm circuit as well as the decoded circuit. Wireless alarm system which is small, easily installed, long in transmission distance, strong in anti-interference, low in false alarm rate, reliable as well as it is scalable and easy to modify. As time goes on, new features can be also added in if needed.

引用

页码：133 / +

页数：2

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