Compact digital implementation of a quadratic integrate-and-fire neuron

A compact fixed-point digital implementation of a quadratic integrate-and-fire (QIF) neural model was developed. Equations were derived to determine the minimum number of bits the digital QIF model requires to represent all four states of the QIF model and control the switching threshold of the output voltage. In addition, the equations were used to minimize the size of the multiplier used for the nonlinear squaring function, V-2. These design equations were used to develop test vectors that could unambiguously show all four states of a digital QIF model. The FPGA implementation of the QIF model was shown to be computationally efficient, requiring only two fixed-point adders and one fixed-point multiplier.