A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures

被引：7
|
作者：
Ma Fei [1 ]
Liu Hong-Xia [1 ]
Kuang Qian-Wei [1 ]
Fan Ji-Bin [1 ]
机构：
[1] Xidian Univ, Sch Microelect, Key Lab, Minist Educ Wide Band Gap Semicond Mat & Devices, Xian 710071, Peoples R China
来源：
CHINESE PHYSICS B | 2012年 / 21卷 / 05期
基金：
中国国家自然科学基金;
关键词：
threshold voltage; high-k gate dielectric; fringing-induced barrier lowering; short channel effect; FIELD;
D O I：
10.1088/1674-1056/21/5/057304
中图分类号：
O4 [物理学];
学科分类号：
0702 ;
摘要：
We investigate the influence of voltage drop across the lightly doped drain (LDD) region and the built-in potential on MOSFETs, and develop a threshold voltage model for high-k gate dielectric MOSFETs with fully overlapped LDD structures by solving the two-dimensional Poisson's equation in the silicon and gate dielectric layers. The model can predict the fringing-induced barrier lowering effect and the short channel effect. It is also valid for non-LDD MOSFETs. Based on this model, the relationship between threshold voltage roll-off and three parameters, channel length, drain voltage and gate dielectric permittivity, is investigated. Compared with the non-LDD MOSFET, the LDD MOSFET depends slightly on channel length, drain voltage, and gate dielectric permittivity. The model is verified at the end of the paper.
引用
收藏
页数：6
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