Extrinsic and Intrinsic Performance of Vertical InAs Nanowire MOSFETs on Si Substrates

被引:52
作者
Persson, Karl-Magnus [1 ]
Berg, Martin [1 ]
Borg, Mattias B. [1 ]
Wu, Jun [1 ]
Johansson, Sofia [1 ]
Svensson, Johannes [1 ]
Jansson, Kristofer [1 ]
Lind, Erik [1 ]
Wernersson, Lars-Erik [1 ]
机构
[1] Lund Univ, Dept Elect & Informat Technol, S-22100 Lund, Sweden
关键词
InAs; MOSFET; nanowire (NW); RF; TRANSISTORS;
D O I
10.1109/TED.2013.2272324
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents dc and RF characterization as well as modeling of vertical InAs nanowire (NW) MOSFETs with L-G = 200 nm and Al2O3/HfO2 high-kappa dielectric. Measurements at V-DS = 0.5 V show that high transconductance (g(m) = 1.37 mS/mu m), high drive current (I-DS = 1.34 mA/mu m), and low ON-resistance (R-ON = 287 Omega mu m) can be realized using vertical InAs NWs on Si substrates. By measuring the 1/f -noise, the gate area normalized gate voltage noise spectral density, S-VG center dot L-G center dot W-G, is determined to be lowered by one order of magnitude compared with similar devices with a high-kappa film consisting of HfO2 only. In addition, with a virtual source model we are able to determine the intrinsic transport properties. These devices (L-G = 200 nm) show a high injection velocity (upsilon(inj) = 1.7 x 10(7) cm/s) with a performance degradation for array FETs predominantly due to an increase in series resistance.
引用
收藏
页码:2761 / 2767
页数:7
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