Hardware Prefetchers Leak : A Revisit of SVF for Cache-Timing Attacks

被引:5
作者
Bhattacharya, Sarani [1 ]
Rebeiro, Chester [1 ]
Mukhopadhyay, Debdeep [1 ]
机构
[1] Indian Inst Technol Kharagpur, Dept Comp Sci & Engn, Kharagpur, W Bengal, India
来源
2012 IEEE/ACM 45TH INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE WORKSHOPS | 2012年
关键词
cache timing attacks; hardware prefetching; SVF; side channel measurements;
D O I
10.1109/MICROW.2012.13
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Micro-architectural features have an influence on security against cache attacks. This paper shows that modern hardware prefetchers enabled in cache memories to reduce the miss penalty, can be a source of information leakage with respect to cache-timing attacks. The work revisits the Side Channel Vulnerability Factor (SVF) proposed in ISCA'12 and shows how to adapt the metric to assess the vulnerability of a prefetcher in cache-timing attacks. We use the modified metric denoted Timing-SVF, to show that standard prefetchers based on sequential algorithms can leak information in cache timing attacks. The findings have been established by experimental validations on a standard 128 bit cipher, called CLEFIA, designed by Sony Corporation Ltd. and used for light weight cryptography.
引用
收藏
页码:17 / 23
页数:7
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