An Adaptive Feed-Forward Phase Locked Loop for Grid Synchronization of Renewable Energy Systems under Wide Frequency Deviations

被引:16
作者
Kathiresan, Aravind Chellachi [1 ]
PandiaRajan, Jeyaraj [1 ]
Sivaprakash, Asokan [1 ]
Babu, Thanikanti Sudhakar [2 ]
Islam, Md Rabiul [3 ]
机构
[1] MepcoSchlenk Engn Coll Autonomous, Dept Elect & Elect Engn, Sivakasi 626005, India
[2] Univ Tenaga Nas, Inst Power Engn, Dept Elect Power Engn, Kajang 43000, Malaysia
[3] Univ Wollongong, Sch Elect Comp & Telecommun Engn, Wollongong, NSW 2522, Australia
关键词
adaptive PLL; feed-forward PLL; grid synchronization; phase-locked loop; 3-PHASE PLL;
D O I
10.3390/su12177048
中图分类号
X [环境科学、安全科学];
学科分类号
08 ; 0830 ;
摘要
Synchronization is a crucial problem in the grid-connected inverter's control and operation. A phase-locked loop (PLL) is a typical grid synchronization strategy, which ought to have a high resistance to power system uncertainties since its sensitivity influences the generated reference signal. The traditional PLL catches the phase and frequency of the input signal via the feedback loop filter (LF). In general, to enhance the steady-state capability during distorted grid conditions generally, a filter tuned for nominal frequency is used. This PLL corrects large frequency deviations around the nominal frequency, which increases the PLL's locking time. Therefore, this paper presents an adaptive feed-forward PLL, where the input signal frequency and phase under large frequency deviations are tracked precisely, which overcomes the above-mentioned limitations. The proposed adaptive PLL consists of a feedback loop that reduces the phase error. The feed-forward loop predicts the frequency and phase error, and the frequency adaptive FIR filter reduces the ripples in output, which is due to input distortions. The adaptive mechanism adjusts the gain of the filter in accordance with the supply frequency. This reduces the phase and frequency error and also decreases the locking time under wide frequency deviations. To verify the effectiveness of the proposed adaptive feed-forward PLL, the system was tested under different grid abnormal conditions. Further, the stability analysis has been carried out via a developed prototype test platform in the laboratory. To bring the proposed simulations into real-time implementations and for control strategies, an Altera Cyclone II field-programmable gate array (FPGA) board has been used. The obtained results of the proposed PLL via simulations and hardware are compared with conventional techniques, and it indicates the superiority of the proposed method. The proposed PLL effectively able to tackle the different grid uncertainties, which can be observed from the results presented in the result section.
引用
收藏
页数:15
相关论文
共 25 条
  • [1] Performance Evaluation of Type-3 PLLs Under Wide Variation in Input Voltage and Frequency
    Aravind, C. K.
    Rani, B. Indu
    Manickam, Chakkarapani
    Guerrero, Josep M.
    Ganesan, Saravana Ilango
    Nagamani, Chilakapati
    [J]. IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, 2017, 5 (03) : 971 - 981
  • [2] Behera RR, 2016, 2016 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, AND OPTIMIZATION TECHNIQUES (ICEEOT), P2876, DOI 10.1109/ICEEOT.2016.7755223
  • [3] A phase tracking system for three phase utility interface inverters
    Chung, SK
    [J]. IEEE TRANSACTIONS ON POWER ELECTRONICS, 2000, 15 (03) : 431 - 438
  • [4] MAF-PLL With Phase-Lead Compensator
    Golestan, Saeed
    Guerrero, Josep M.
    Abusorrah, Abdullah M.
    [J]. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2015, 62 (06) : 3691 - 3695
  • [5] A Quasi-Type-1 Phase-Locked Loop Structure
    Golestan, Saeed
    Freijedo, Francisco D.
    Vidal, Ana
    Guerrero, Josep M.
    Doval-Gandoy, Jesus
    [J]. IEEE TRANSACTIONS ON POWER ELECTRONICS, 2014, 29 (12) : 6264 - 6270
  • [6] An Analysis of the PLLs With Secondary Control Path
    Golestan, Saeed
    Ramezani, Malek
    Guerrero, Josep M.
    [J]. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2014, 61 (09) : 4824 - 4828
  • [7] A novel synchronization scheme for grid-connected converters by using adaptive linear optimal filter based PLL (ALOF-PLL)
    Han, Yang
    Xu, Lin
    Khan, Muhammad Mansoor
    Yao, Gang
    Zhou, Li-Dan
    Chen, Chen
    [J]. SIMULATION MODELLING PRACTICE AND THEORY, 2009, 17 (07) : 1299 - 1345
  • [8] Performance Improvement of Quasi-Type-1 PLL by using a Complex Notch Filter
    Li, Yunlu
    Wang, Dazhi
    Han, Wei
    Tan, Sen
    Guo, Xifeng
    [J]. IEEE ACCESS, 2016, 4 : 6272 - 6282
  • [9] Robust and Fast Three-Phase PLL Tracking System
    Liccardo, Felice
    Marino, Pompeo
    Raimondo, Giuliano
    [J]. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2011, 58 (01) : 221 - 231
  • [10] A Direct Power Conversion Topology for Grid Integration of Hybrid AC/DC Energy Resources
    Liu, Xiong
    Loh, Poh Chiang
    Wang, Peng
    Blaabjerg, Frede
    [J]. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2013, 60 (12) : 5696 - 5707