A new definition of threshold voltage in Tunnel FETs

被引:128
作者
Boucart, Kathy [1 ]
Ionescu, Adrian Mihai [1 ]
机构
[1] Ecole Polytech Fed Lausanne, IMM, Elect Lab LEG, CH-1015 Lausanne, Switzerland
关键词
band-to-band tunneling; double gate; gated p-i-n diode; high-k dielectric; scaling; subthreshold swing; threshold voltage; Tunnel field effect transistor;
D O I
10.1016/j.sse.2008.04.003
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This work reports on the physical definition and extraction of threshold voltage in Tunnel FETs (field effect transistors) based on numerical simulation data. it is shown that the Tunnel FET has the outstanding property of having two threshold voltages: one in terms of gate voltage, V-TG, and one in terms of drain voltage, V-TD. These threshold voltages can be physically defined based on the transition between a quasi-exponential dependence, and a linear dependence of the drain current on V-GS or V-DS, and by extension, on the saturation of the tunneling energy barrier width narrowing. The extractions of V-TG and V-TD are performed based on the transconductance change method in the double gate Tunnel FET with a high-k dielectric, and a systematic comparison with the constant current method is reported. The effect of gate length scaling on these Tunnel FETs' threshold voltages, as well as the dependence of V-TG on applied drain voltage and V-TD on applied gate voltage, are investigated. (C) 2008 Elsevier Ltd. All rights reserved.
引用
收藏
页码:1318 / 1323
页数:6
相关论文
共 17 条
[1]  
[Anonymous], 2006, ATLAS USERS MANUAL S
[2]   Band-to-band tunneling in carbon nanotube field-effect transistors [J].
Appenzeller, J ;
Lin, YM ;
Knoch, J ;
Avouris, P .
PHYSICAL REVIEW LETTERS, 2004, 93 (19) :196805-1
[3]   Lateral interband tunneling transistor in silicon-on-insulator [J].
Aydin, C ;
Zaslavsky, A ;
Luryi, S ;
Cristoloveanu, S ;
Mariolle, D ;
Fraboulet, D ;
Deleonibus, S .
APPLIED PHYSICS LETTERS, 2004, 84 (10) :1780-1782
[4]  
Bhuwalka K. K., 2005, C ULT INT SI, P135
[5]   Scaling the vertical tunnel FET with tunnel bandgap modulation and gate workfunction engineering [J].
Bhuwalka, KK ;
Schulze, J ;
Eisele, I .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2005, 52 (05) :909-917
[6]   Vertical tunnel field-effect transistor [J].
Bhuwalka, KK ;
Sedlmaier, S ;
Ludsteck, AK ;
Tolksdorf, A ;
Schulze, J ;
Eisele, I .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2004, 51 (02) :279-282
[7]   THE EFFECT OF CHANNEL IMPLANTS ON MOS-TRANSISTOR CHARACTERIZATION [J].
BOOTH, RV ;
WHITE, MH ;
WONG, HS ;
KRUTSICK, TJ .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1987, 34 (12) :2501-2509
[8]   Threshold voltage in Tunnel FETs: physical definition, extraction, scaling and impact on IC design [J].
Boucart, Kathy ;
Ionescu, Adrian M. .
ESSDERC 2007: PROCEEDINGS OF THE 37TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE, 2007, :299-302
[9]   Double-gate tunnel FET with high-κ gate dielectric [J].
Boucart, Kathy ;
Mihai Ionescu, Adrian .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (07) :1725-1733
[10]   Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mV/dec [J].
Choi, Woo Young ;
Park, Byung-Gook ;
Lee, Jong Duk ;
Liu, Tsu-Jae King .
IEEE ELECTRON DEVICE LETTERS, 2007, 28 (08) :743-745