Fractional Pulse Skipping in Digitally Controlled DC-DC Converters for Improved Light-load Efficiency and Power Spectrum

Pulse skipping modulation (PSM) helps to improve the light-load efficiency in a DC-DC converter with a stable periodic behaviour and predictable ripple parameters. A periodic steady-state operation under PSM consists of a charge pulse followed by a pre-defined count of skipped pulses, where individual pulses are referred to a fixed-frequency clock with a time period T. Thus the overall time period is simply the total count of pulses times the time period T, and the power spectrum is distributed accordingly. Although the light-load efficiency improves by increasing the number of skipped cycles, the count is limited by the specified output voltage ripple. This paper introduces a novel concept of fractional pulse skipping in a digitally controlled PSM DC-DC converter, which improves the power spectrum, without degrading the efficiency and violating the ripple constraint. In the proposed PSM, the number of charge and skipped cycles can be fully customized and the skipped cycle count needs to be periodically varied. The proposed PSM uses an existing digital-pulse-width-modulator (DPWM) architecture and adds extra features with only a little modification. Thus a seamless PSM/PWM transition can be inherently achieved. Stability analysis is carried out using discrete-time models and design guidelines are presented. The proposed scheme is implemented using an FPGA device and tested in a mixed-signal current-mode DPWM buck converter.