Effect of SOI LDMOS epitaxial layer thickness on breakdown voltage

被引:2
作者
Wu, Cheng-Yen [1 ]
You, Hsin-Chiang [1 ]
机构
[1] Natl Chin Yi Univ Technol, Dept Elect Engn, 57,Sec 2,Zhongshan Rd, Taichung 41170, Taiwan
来源
2018 INTERNATIONAL SYMPOSIUM ON COMPUTER, CONSUMER AND CONTROL (IS3C 2018) | 2018年
关键词
Power Components; Breakdown Voltage; SOI; Epitaxial Layer; Simulation Software; TRENCH LDMOS; STRESS; FIELD; STI; TRANSISTORS; MOSFETS; IMPACT; LOCOS;
D O I
10.1109/IS3C.2018.00028
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Power semiconductors are commonly used in LED bulbs and computer transformers, and are also widely used in industrial equipment, automotive electronic ignition systems, mobile phone battery charging and communication equipment. Power semiconductors are also often used as protective switches as the first goalkeeper for electrical appliances. This paper mainly studies the effect of the epitaxial layer thickness on electric characteristics and finds the suitable epitaxial layer thickness to achieve breakdown voltage more than 700 V to ensure the safety of device usage. The power semiconductors simulated in this study achieve the static breakdown voltage of 805 V for the device based on the epitaxial layer (similar to 15 mu m) on SOI substrate. The device based on the epitaxial layer (similar to 3 mu m) on SOI substrate achieves the static breakdown voltage of 751 V, and reaches the dynamic breakdown voltage of 704 V under 5 V gate voltages.
引用
收藏
页码:80 / 83
页数:4
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