Simulation of the RRAM-based Flip-Flops with Data Retention

被引：0

作者：

Li, Mu ^{[1
]}

Huang, Peng ^{[2
]}

Shen, Lei ^{[2
]}

Zhou, Zheng ^{[2
]}

Kang, Jin-Feng ^{[2
]}

Liu, Xiao-Yan ^{[2
]}

机构：

[1] Peking Univ, Shenzhen Grad Sch, Shenzhen, Peoples R China

[2] Peking Univ, Inst Microelect, Beijing, Peoples R China

来源：

7TH IEEE INTERNATIONAL NANOELECTRONICS CONFERENCE (INEC) 2016 | 2016年

关键词：

RRAM; non-volatile; flip-flop; IoT; 1T1R; SPICE; MODEL;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A RRAM-based non-volatile flip-flop (NVFF) is designed to meet energy efficiency requirement for standby-power-critical applications in the deployment solution of IoT (Internet of Things). Adding only a pair of 1T1R cell into slave latch of a traditional FF can cut off the standby leakage at the cost of 4pJ write energy, and 20ps data retention time upon ideal power-on. The NVFF circuit is simulated and analyzed in HSPICE with a SPICE compact model of oxide-based RRAM on the conductive filament evolution model.

引用

页数：2

共 5 条

[1] A Physics-Based Compact Model of Metal-Oxide-Based RRAM DC and AC Operations
Huang, Peng
Liu, Xiao Yan
Chen, Bing
Li, Hai Tong
Wang, Yi Jiao
Deng, Ye Xin
Wei, Kang Liang
Zeng, Lang
Gao, Bin
Du, Gang
Zhang, Xing
Kang, Jin Feng
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2013, 60 (12) : 4090 - 4097
[2] Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design
Kazi, Ibrahim
Meinerzhagen, Pascal
Gaillardon, Pierre-Emmanuel
Sacchetto, Davide
Leblebici, Yusuf
Burg, Andreas
De Micheli, Giovanni
[J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2014, 61 (11) : 3155 - 3164
[3] A SPICE Model of Resistive Random Access Memory for Large-Scale Memory Array Simulation
Li, Haitong
Huang, Peng
Gao, Bin
Chen, Bing
Liu, Xiaoyan
Kang, Jinfeng
[J]. IEEE ELECTRON DEVICE LETTERS, 2014, 35 (02) : 211 - 213
[4] A 1-V high-speed MTCMOS circuit scheme for power-down application circuits
Shigematsu, S
Mutoh, S
Matsuya, Y
Tanabe, Y
Yamada, J
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (06) : 861 - 869
[5] Waser R., 2008, EL DEV M 2008 IEDM 2, P1

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